Design Verification Research Intern (Start ASAP)

Job Description

• Our researchers and engineers pursue innovation in a range of scientific and technical disciplines to help solve complex challenges in diverse fields, including computing, healthcare, economics, and the environment.
• The Azure Hardware Architecture team innovates using a mix of algorithmic innovation, custom hardware, and framework-level software that interfaces to the hardware. 

Responsibilities

• Interns put inquiry and theory into practice alongside fellow doctoral candidates and some of the world’s best researchers, interns learn, collaborate, and network for life.
• Interns not only advance their careers but also contribute to exciting research and development strides.
• During the 12-week internship, students are paired with mentors and expected to collaborate with other interns and researchers, present findings, and contribute to the vibrant life of the community.

Required Qualifications

• Must be currently enrolled in a Master's or Ph.D. program in Electrical Engineering or Computer Engineering with a focus on Design Verification.
• We're looking for a research intern to develop a design verification framework that can be easily adapted to verify different hardware designs described in Register Transfer Level (RTL). 
• A successful candidate will have a strong background in design and formal verification experience with SystemVerilog and Universal Verification Methodology (UVM) is desirable.
• Participation in the Research Internship Program requires that you are physically located in the United States or Canada for the duration of the internship.

Preferred Qualifications

• Knowledge of Verilog / SystemVerilog / UVM is desirable.
• Experience with design verification framework is desirable.